Disjoint-Support Decomposition and Extraction for Interconnect-Driven Threshold Logic Synthesis-Reference-Cited by-同舟云学术

Disjoint-Support Decomposition and Extraction for Interconnect-Driven Threshold Logic Synthesis

Published:2019-06-02 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 56th Annual Design Automation Conference 2019
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Author:

Chen Hao¹,Hung Shao-Chun¹,Jiang Jie-Hong R.¹

Affiliation:

1. Department of Electrical Engineering / Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3316781.3317801

Reference20 articles.

1. VLSI implementations of threshold logic- a comprehensive survey

2. Berkeley Logic Synthesis and Verification Group. ABC: A System for Sequential Synthesis and Verification. https://people.eecs.berkeley.edu/~alanmi/abc/. Berkeley Logic Synthesis and Verification Group. ABC: A System for Sequential Synthesis and Verification. https://people.eecs.berkeley.edu/~alanmi/abc/.

3. Quantum-dot cellular automata: an architecture for molecular computing

4. Fast synthesis of threshold logic networks with optimization

5. Logic synthesis of binarized neural networks for efficient circuit implementation

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