Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on Program Inputs

Author:

Da Silva Junio Cezar Ribeiro1,Leão Lorena1,Petrucci Vinicius2,Gamatié Abdoulaye3,Pereira Fernando Magno Quintão4

Affiliation:

1. Universidade Federal de Minas Gerais, Belo Horizonte, MG, Brazil

2. Universidade Federal da Bahia and University of Pittsburgh, Pittsburgh, PA, USA

3. LIRMM, University Montpellier, CNRS, France

4. Universidade Federal da Bahia and University of Pittsburgh

Abstract

A hardware configuration is a set of processors and their frequency levels in a multicore heterogeneous system. This article presents a compiler-based technique to match functions with hardware configurations. Such a technique consists of using multivariate linear regression to associate function arguments with particular hardware configurations. By showing that this classification space tends to be convex in practice, this article demonstrates that linear regression is not only an efficient tool to map computations to heterogeneous hardware, but also an effective one. To demonstrate the viability of multivariate linear regression as a way to perform adaptive compilation for heterogeneous architectures, we have implemented our ideas onto the Soot Java bytecode analyzer. Code that we produce can predict the best configuration for a large class of Java and Scala benchmarks running on an Odroid XU4 big.LITTLE board; hence, outperforming prior techniques such as ARM’s GTS and CHOAMP, a recently released static program scheduler.

Funder

ANR

CNPq

FAPEMIG

CAPES

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

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4. SLOOP: QoS-supervised loop execution to reduce energy on heterogeneous architectures;Azhar M. Waqar;ACM Transactions on Architecture and Code Optimization,2017

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