A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to Circuits

Author:

Wu Ying1ORCID,Chen Chuangtao1ORCID,Xiao Weihua2ORCID,Wang Xuan2ORCID,Wen Chenyi1ORCID,Han Jie3ORCID,Yin Xunzhao1ORCID,Qian Weikang2ORCID,Zhuo Cheng1ORCID

Affiliation:

1. Zhejiang University, China

2. Shanghai Jiao Tong University, China

3. University of Alberta, Canada

Abstract

Given the stringent requirements of energy efficiency for Internet-of-Things edge devices, approximate multipliers, as a basic component of many processors and accelerators, have been constantly proposed and studied for decades, especially in error-resilient applications. The computation error and energy efficiency largely depend on how and where the approximation is introduced into a design. Thus, this article aims to provide a comprehensive review of the approximation techniques in multiplier designs ranging from algorithms and architectures to circuits. We have implemented representative approximate multiplier designs in each category to understand the impact of the design techniques on accuracy and efficiency. The designs can then be effectively deployed in high-level applications, such as machine learning, to gain energy efficiency at the cost of slight accuracy loss.

Funder

National Key R&D Program of China

National Natural Science Foundation of China

SGC Cooperation Project

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

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