Affiliation:
1. The George Washington University, Washington, DC
Abstract
As embedded and real-time systems increase in complexity, and as chip process technologies continually decrease feature size, transient faults increasingly threaten system failure. This paper introduces C
3
, an system to tolerate
system-level faults
(
e.g
. in the scheduler). When considering
predictable
recovery of system-level components, we introduce
recovery interference
, a side-effect of system-level recovery that causes possibly unbounded priority inversion. We discuss an interface-driven recovery technique that is effective, efficient, and uses
on-demand
recovery to avoid recovery interference.
Funder
Division of Computer and Network Systems
Publisher
Association for Computing Machinery (ACM)
Subject
Engineering (miscellaneous),Computer Science (miscellaneous)
Reference11 articles.
1. M.-L. Li P. Ramachandran S. K. Sahoo S. V. Adve V. S. Adve and Y. Zhou "Understanding the propagation of hard errors to software and implications for resilient system design " in Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XIII) 2008. 10.1145/1346281.1346315 M.-L. Li P. Ramachandran S. K. Sahoo S. V. Adve V. S. Adve and Y. Zhou "Understanding the propagation of hard errors to software and implications for resilient system design " in Proceedings of the 13th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XIII) 2008. 10.1145/1346281.1346315
2. The N-Version Approach to Fault-Tolerant Software
3. Operating system support for redundant multithreading
4. Construction of a Highly Dependable Operating System
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