A DRAM-based Near-Memory Architecture for Accelerated and Energy-Efficient Execution of Transformers
Author:
Affiliation:
1. School of Computing and Augmented Intelligence, Arizona State University, USA
Funder
National Science Foundation
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3649476.3658732
Reference17 articles.
1. AMD. 2015. High-Bandwidth Memory (HBM). https://www.amd.com/system/files/documents/high-bandwidth-memory-hbm.pdf.
2. K. Chandrasekar 2024. DRAMPower: Open-source DRAM Power and Energy Estimation Tool . http://www.drampower.info/.
3. Q. Deng 2018. DrAcc: a DRAM based accelerator for accurate CNN inference. In DAC’18.
4. J. Devlin 2018. BERT: Pre-training of Deep Bidirectional Transformers for Language Understanding. CoRR abs/1810.04805 (2018). arXiv:1810.04805
5. Y. Ding 2023. HAIMA: A Hybrid SRAM and DRAM Accelerator-in-Memory Architecture for Transformer. In DAC.
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