PerFT-N: Low-overhead Permanent Fault-Tolerance Mechanism for Neural Processing Units
Author:
Affiliation:
1. Advanced Computing and Digital Engineering Research Institute, Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, China
2. Shenzhen Institute of Advanced Technology, Chinese Academy of Sciences, China
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3649476.3658717
Reference10 articles.
1. MOZART+: Masking Outputs With Zeros for Improved Architectural Robustness and Testing of DNN Accelerators
2. Bo Dong et al. 2021. OR-ML: Enhancing Reliability for Machine Learning Accelerator with Opportunistic Redundancy. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). 739–742.
3. Maksim Jenihhin et al. 2019. Challenges of Reliability Assessment and Enhancement in Autonomous Systems. In 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT). 1–6.
4. M2STaR: A Multimode Spatio-Temporal Redundancy Design for Fault-Tolerant Coarse-Grained Reconfigurable Architectures
5. Fanruo Meng et al. 2021. A Self-Test Framework for Detecting Fault-induced Accuracy Drop in Neural Network Accelerators. In 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC). 722–727.
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