Educational Tool-spaces for Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis-Reference-Cited by-同舟云学术

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Educational Tool-spaces for Convolutional Neural Network FPGA Design Space Exploration Using High-Level Synthesis

Published:2024-06-12 Issue: Volume: Page:343-346
ISSN:
Container-title:Proceedings of the Great Lakes Symposium on VLSI 2024
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Author:

Yarnell Richard C¹^ORCID,Hossain Mousam¹^ORCID,Graterol Raul¹^ORCID,Pindoria Ayush¹^ORCID,Ghimire Sujan²^ORCID,Chowdhury Muhtasim Alam²^ORCID,Salehi Soheil²^ORCID,Bai Yu³^ORCID,Demara Ronald F.¹^ORCID

Affiliation:

1. Electrical and Computer Engineering, University of Central Florida, USA

2. Electrical and Computer Engineering, University of Arizona, USA

3. Electrical and Computer Engineering, California State University, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3649476.3658786

Reference13 articles.

1. Ronald F. DeMara and Dan I. Moldovan. 1991. The SNAP-1 parallel AI prototype. In Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, ON, Canada, 2-11.

2. Jason Lohn, Greg Larchev and Ronald F. DeMara. 2003. Evolutionary fault recovery in a Virtex FPGA using a representation that incorporates routing. In Proceedings of International Parallel and Distributed Processing Symposium (IPDPS ‘03). Nice, France, 8.

3. Federico Serafini and Giacomo Boldini. 2023. High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition. Retrieved February 19, 2024 from https://github.com/FedericoSerafini/HLS-CNN.

4. A Survey of Convolutional Neural Networks: Analysis, Applications, and Prospects

5. Open-Source Educational Platform for FPGA Accelerated AI in Robotics

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