Enabling Reconfigurable HPC through MPI-based Inter-FPGA Communication-Reference-Cited by-同舟云学术

Enabling Reconfigurable HPC through MPI-based Inter-FPGA Communication

Published:2023-06-21 Issue: Volume: Page:
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Container-title:Proceedings of the 37th International Conference on Supercomputing
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Author:

Contini Nicholas¹^ORCID,Ramesh Bharath²^ORCID,Kandadi Suresh Kaushik¹^ORCID,Tran Tu¹^ORCID,Michalowicz Ben¹^ORCID,Abduljabbar Mustafa¹^ORCID,Subramoni Hari²^ORCID,Panda Dhabaleswar²^ORCID

Affiliation:

1. Department of Computer Science and Engineering / Network-Based Computing Laboratory, The Ohio State University, Columbus, Ohio, USA

2. Department of Computer Science and Engineering / Network-Based Computing Laboratory, The Ohio State University, Columbus, Ohio, United States of America

Publisher

ACM

Reference29 articles.

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2. FPGAs in Supercomputers

3. Christgau , S. , Knaust , M. , Steinke , T. : A first step towards support for mpi partitioned communication on sycl-programmed fpgas . In: IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, H2RC@ SC 2022 , Dallas, TX, USA , November , 2022 (2022) Christgau, S., Knaust, M., Steinke, T.: A first step towards support for mpi partitioned communication on sycl-programmed fpgas. In: IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing, H2RC@ SC 2022, Dallas, TX, USA, November, 2022 (2022)

4. Favaro , F. , Dufrechou , E. , Oliver , J.P. , Ezzatti , P. : Time-power-energy balance of blas kernels in modern fpgas. In : Navaux, P., Barrios H., C.J., Osthoff, C., Guerrero, G. (eds.) High Performance Computing. pp. 78 -- 89 . Springer International Publishing , Cham ( 2022 ) Favaro, F., Dufrechou, E., Oliver, J.P., Ezzatti, P.: Time-power-energy balance of blas kernels in modern fpgas. In: Navaux, P., Barrios H., C.J., Osthoff, C., Guerrero, G. (eds.) High Performance Computing. pp. 78--89. Springer International Publishing, Cham (2022)

5. Freitag , T. : Acceleration of an autoencoder using a fpga-soc in a high-performance node of a distributed onboard computer ( 2022 ), https://publica.fraunhofer.de/handle/publica/430107 Freitag, T.: Acceleration of an autoencoder using a fpga-soc in a high-performance node of a distributed onboard computer (2022), https://publica.fraunhofer.de/handle/publica/430107

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