Just what is an op-code?

Author:

Brakefield James1

Affiliation:

1. San Antonio, Texas

Abstract

The following computer architecture offers extensible machine language. That is it has an open-ended instruction set. It does this by using the same format for both op-codes and subroutine calls. Theoretically this means that the programmer can chose an instruction set for the application at hand. Ie., the machine language representation of a program can correspond to a high level textual representation or a program.The mechanism of instruction processing for this architecture is essentially a way of encompassing the major categories of interpreters : Direct threaded code, indirect threaded code, and P-code or compressed threaded code. The mechanism is closest in spirit to that of Forth and can be considered a hardware implementation of Forth.Due to the simplicity of instruction set representation, the design is not tied to any one word size. Thus, it is implementable on all the major word sizes (16, 24, 32, 36, 48, 60, or 64 bits).I hope this is perceived as an elegant design.

Publisher

Association for Computing Machinery (ACM)

Reference8 articles.

1. The evolution of FORTH--An unusual language;Moore C.;Byte,1980

2. An Architectural Trail to Threaded-Code Systems

3. Brodie L. 1981. Starting FORTH. Englewood Cliffs N.J. : Prentice-Hall. Brodie L. 1981. Starting FORTH. Englewood Cliffs N.J. : Prentice-Hall.

4. Brakefield J. May 1982 (tenative). Interpreter mechanism computers. 68 Micro-Journal. Brakefield J. May 1982 (tenative). Interpreter mechanism computers. 68 Micro-Journal.

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Two-level hybrid interpreter/native code execution for combined space-time program efficiency;ACM SIGPLAN Notices;1987-07

2. On the design of Always Compatible Instruction Set Architecture(ACISA);ACM SIGARCH Computer Architecture News;1983-12

3. Peering through the RISC/CISC fog;ACM SIGARCH Computer Architecture News;1983-03

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