METRIC

Author:

Marathe Jaydeep1,Mueller Frank1,Mohan Tushar2,Mckee Sally A.3,De Supinski Bronis R.4,Yoo Andy4

Affiliation:

1. North Carolina State University, Raleigh, NC

2. IBM India Research Lab, Hauz Khas, New Delhi

3. Cornell University, Ithaca, NY

4. Lawrence Livermore National Laboratory, Livermore, CA

Abstract

With the diverging improvements in CPU speeds and memory access latencies, detecting and removing memory access bottlenecks becomes increasingly important. In this work we present METRIC, a software framework for isolating and understanding such bottlenecks using partial access traces. METRIC extracts access traces from executing programs without special compiler or linker support. We make four primary contributions. First, we present a framework for extracting partial access traces based on dynamic binary rewriting of the executing application. Second, we introduce a novel algorithm for compressing these traces. The algorithm generates constant space representations for regular accesses occurring in nested loop structures. Third, we use these traces for offline incremental memory hierarchy simulation. We extract symbolic information from the application executable and use this to generate detailed source-code correlated statistics including per-reference metrics, cache evictor information, and stream metrics. Finally, we demonstrate how this information can be used to isolate and understand memory access inefficiencies. This illustrates a potential advantage of METRIC over compile-time analysis for sample codes, particularly when interprocedural analysis is required.

Publisher

Association for Computing Machinery (ACM)

Subject

Software

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Merchandiser;Proceedings of the 28th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming;2023-02-21

2. Cinnamon: A Domain-Specific Language for Binary Profiling and Monitoring;2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO);2021-02-27

3. Alleria;ACM Transactions on Embedded Computing Systems;2019-10-19

4. Rewriting toward trace coverage analysis of symmetric systems;Innovations in Systems and Software Engineering;2019-06-10

5. Stack-Size Sensitive On-Chip Memory Backup for Self-Powered Nonvolatile Processors;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2017-11

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