Hierarchical Ensemble Reduction and Learning for Resource-constrained Computing

Author:

Wang Hongfei1,Li Jianwen1,He Kun1

Affiliation:

1. Huazhong University of Science and Technology, Wuhan, China

Abstract

Generic tree ensembles (such as Random Forest, RF) rely on a substantial amount of individual models to attain desirable performance. The cost of maintaining a large ensemble could become prohibitive in applications where computing resources are stringent. In this work, a hierarchical ensemble reduction and learning framework is proposed. Experiments show our method consistently outperforms RF in terms of both accuracy and retained ensemble size. In other words, ensemble reduction is achieved with enhancement in accuracy rather than degradation. The method can be executed efficiently, up to >590× time reduction than a recent ensemble reduction work. We also developed Boolean logic encoding techniques to directly tackle multiclass problems. Moreover, our framework bridges the gap between software-based ensemble methods and hardware computing in the IoT era. We developed a novel conversion paradigm that supports the automatic deployment of >500 trees on a chip. Our proposed method reduces power consumption and overall area utilization by >21.5% and >62%, respectively, comparing with RF. The hierarchical approach provides rich opportunities to balance between the computation (training and response time), the hardware resource (memory and energy), and accuracy.

Funder

National Natural Science Foundation of China

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Reference38 articles.

1. Ron Bekkerman Mikhail Bilenko and John Langford. 2012. Scaling Up Machine Learning: Parallel and Distributed Approaches. Cambridge University Press Cambridge UK. Ron Bekkerman Mikhail Bilenko and John Langford. 2012. Scaling Up Machine Learning: Parallel and Distributed Approaches. Cambridge University Press Cambridge UK.

2. R. K. Brayton G. D. Hachtel C. T. McMullen and A. L. Sangiovanni-Vincentelli. 1984. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers Hingham MA. R. K. Brayton G. D. Hachtel C. T. McMullen and A. L. Sangiovanni-Vincentelli. 1984. Logic Minimization Algorithms for VLSI Synthesis. Kluwer Academic Publishers Hingham MA.

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