1. AMD. 2022. Reducing Kernel to Kernel Communication Latency with OpenCL Pipes Vitis Unified Software Platform Documentation: Application Acceleration Development (UG1393). https://docs.xilinx.com/r/2021.2-English/ug1393-vitis-application-acceleration/Reducing-Kernel-to-Kernel-Communication-Latency-in-OpenCL-Kernels Accessed: 19 Dec 2023.
2. AMD. 2023. Canny Edge Detection. https://docs.xilinx.com/r/en-US/Vitis_Libraries/vision/canny-bm.html Accessed 19 Dec 2023.
3. ARM. 2010. AMBA® 4 AXI4-Stream Protocol specification version 1.0. https://developer.arm.com/documentation/ihi0051/a Accessed 19 Dec 2023.
4. Invited paper: Using OpenCL to evaluate the efficiency of CPUS, GPUS and FPGAS for information filtering
5. Intel Corporation. 2023. SYCL_INTEL_data_flow_pipes. https://github.com/intel/llvm/blob/sycl/sycl/doc/extensions/supported/sycl_ext_intel_dataflow_pipes.asciidoc Accessed 9 Jan 2023.