From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus-Reference-Cited by-同舟云学术

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch Stimulus

Published:2022-08-29 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 51st International Conference on Parallel Processing
language:
Short-container-title:

Author:

Lin Dian-Lun¹,Ren Haoxing²,Zhang Yanqing²,Khailany Brucek²,Huang Tsung-Wei¹

Affiliation:

1. University of Utah, United States of America

2. Nvidia Research, United States of America

Funder

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3545008.3545091

Reference34 articles.

1. 2012. Nvidia System Management Interface. https://developer.nvidia.com/nvidia-system-management-interface. 2012. Nvidia System Management Interface. https://developer.nvidia.com/nvidia-system-management-interface.

2. 2012. Yosys. https://yosyshq.net/yosys/. 2012. Yosys. https://yosyshq.net/yosys/.

3. 2016. Spinal. https://github.com/SpinalHDL/VexRiscv. 2016. Spinal. https://github.com/SpinalHDL/VexRiscv.

4. 2017. Nvidia Deep Learning Accelerator Design (NVDLA). http://nvdla.org/. 2017. Nvidia Deep Learning Accelerator Design (NVDLA). http://nvdla.org/.

5. 2017. Nvidia Nsight Systems. https://developer.nvidia.com/nsight-systems. 2017. Nvidia Nsight Systems. https://developer.nvidia.com/nsight-systems.

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. GSAP: A GPU-Accelerated Stochastic Graph Partitioner;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12

2. Solvers, Engines, Tools and Flows: The Next Wave for AI/ML in Physical Design;Proceedings of the 2024 International Symposium on Physical Design;2024-03-12

3. Parallel and Heterogeneous Timing Analysis: Partition, Algorithm, and System;Proceedings of the 2024 International Symposium on Physical Design;2024-03-12

4. A Resource-efficient Task Scheduling System using Reinforcement Learning : Invited Paper;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

5. An Efficient Task-Parallel Pipeline Programming Framework;Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region;2024-01-18