Two-dimensional Search Space for Extracting Broadside Tests from Functional Test Sequences

Abstract

Testing for delay faults after chip manufacturing is critical to correct chip operation. Tests for delay faults are applied using scan chains that provide access to internal memory elements. As a result, a circuit may operate under non-functional operation conditions during test application. This may lead to overtesting. The extraction of broadside tests from functional test sequences ensures that the tests create functional operation conditions. When N functional test sequences of length L +1 are available, the number of broadside tests that can be extracted is N · L . Depending on the source of the functional test sequences, the value of N · L may be large. In this case, it is important to select a subset of n ≤ N sequences and consider only the first l ≤ L clock cycles of every sequence for the extraction of n · l ≪ N · L broadside tests. The two-dimensional N × L search space for broadside tests is the subject of this article. Using a static procedure that considers fixed values of N and l , the article demonstrates that, for the same value of N · L , different circuits benefit from different values of N and l . It also describes a dynamic procedure that matches the parameters N and l to the circuit. The discussion is supported by experimental results for transition faults in benchmark circuits.