Scheduling techniques for variable voltage low power designs

Author:

Lin Yann-Rue1,Hwang Cheng-Tsung2,Wu Allen C.-H.1

Affiliation:

1. Tsing-Hua Univ., Hsinchu, Taiwan

2. Providence Univ., ShaLu, Taiwan

Abstract

This paper presents an integer linear programming (ILP) model and a heuristic for the variable voltage scheduling problem. We present the variable voltage scheduling techniques that consider in turn timing constraints alone, resource constraints alone, and timing and resource constraints together for design space exploration. Experimental results show that our heuristic produces results competitive with those of the ILP method in a fraction of the run-time. The results also show that a wide range of design alternatives can be generated using our design space exploration method. Using different cost/delay combinations, power consumption in a single design can differ by as much as a factor of 6 when using mixed 3.3V and 5V supply voltages.

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Reference13 articles.

1. Lower-power CMOS design;CHANDRAKASAN A.;IEEE J. Solid-State Circuits,1992

2. LINDO 1985. LINDO: Linear Iteractive and Discrete Optimizer for Linear Integer and Quadratic Programming Problems. LINDO Systems Inc. Chicago IL. LINDO 1985. LINDO: Linear Iteractive and Discrete Optimizer for Linear Integer and Quadratic Programming Problems. LINDO Systems Inc. Chicago IL.

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