Breaking Kernel Address Space Layout Randomization with Intel TSX-Reference-Cited by-同舟云学术

Breaking Kernel Address Space Layout Randomization with Intel TSX

Published:2016-10-24 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2016 ACM SIGSAC Conference on Computer and Communications Security
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Author:

Jang Yeongjin¹,Lee Sangho²,Kim Taesoo²

Affiliation:

1. Georgia Institute of Technology, Atlanga, GA, USA

2. Georgia Institute of Technology, Atlanta, GA, USA

Funder

Office of Naval Research

National Science Foundation

Electronics and Telecommunications Research Institute

Defense Advanced Research Projects Agency

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2976749.2978321

Reference64 articles.

1. Anababa. What Does Transactional Synchronization Extensions (TSX) Processor Technology Mean to Vulnerability Exploits (e.g. Brute Forcing)? . http://hypervsir.blogspot.com/2014/11/what-does-transactional-synchronization.html. Anababa. What Does Transactional Synchronization Extensions (TSX) Processor Technology Mean to Vulnerability Exploits (e.g. Brute Forcing)? . http://hypervsir.blogspot.com/2014/11/what-does-transactional-synchronization.html.

2. AWS Blog. Amazon EC2 X1 Instances. https://aws.amazon.com/ec2/instance-types/x1/. AWS Blog. Amazon EC2 X1 Instances. https://aws.amazon.com/ec2/instance-types/x1/.

3. You Can Run but You Can't Read

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