Analyzing Cache Side Channels Using Deep Neural Networks
Author:
Affiliation:
1. The Ohio State University
2. Princeton University
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3274694.3274715
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2. J. Bacelar Almeida Manuel Barbosa Jorge S. Pinto and Bárbara Vieira. 2013. Formal verification of side-channel countermeasures using self-composition. Sci. Comput. Program. (2013). 10.1016/j.scico.2011.10.008 J. Bacelar Almeida Manuel Barbosa Jorge S. Pinto and Bárbara Vieira. 2013. Formal verification of side-channel countermeasures using self-composition. Sci. Comput. Program. (2013). 10.1016/j.scico.2011.10.008
3. Sarani Bhattacharya Chester Rebeiro and Debdeep Mukhopadhyay. 2012. Hardware Prefetchers Leak: A Revisit of SVF for Cache-Timing Attacks. In Hardware and Architectural Support for Security and Privacy. Sarani Bhattacharya Chester Rebeiro and Debdeep Mukhopadhyay. 2012. Hardware Prefetchers Leak: A Revisit of SVF for Cache-Timing Attacks. In Hardware and Architectural Support for Security and Privacy.
4. Cache-Collision Timing Attacks Against AES
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