Tarazu: An Adaptive End-to-End I/O Load Balancing Framework for Large-Scale Parallel File Systems

Author:

Paul Arnab K.1,Neuwirth Sarah2,Wadhwa Bharti3,Wang Feiyi4,Oral Sarp4,Butt Ali R.5

Affiliation:

1. BITS Pilani, KK Birla Goa Campus, Goa, India

2. Johannes Gutenberg University Mainz, Mainz, Germany

3. IBM Research, New York, USA

4. Oak Ridge National Laboratory, Oak Ridge, USA

5. Virginia Tech, Blacksburg, USA

Abstract

The imbalanced I/O load on large parallel file systems affects the parallel I/O performance of high-performance computing (HPC) applications. One of the main reasons for I/O imbalances is the lack of a global view of system-wide resource consumption. While approaches to address the problem already exist, the diversity of HPC workloads combined with different file striping patterns prevents widespread adoption of these approaches. In addition, load balancing techniques should be transparent to client applications. To address these issues, we propose Tarazu, an end-to-end control plane where clients transparently and adaptively write to a set of selected I/O servers to achieve balanced data placement. Our control plane leverages real-time load statistics for global data placement on distributed storage servers, while our design model employs trace-based optimization techniques to minimize latency for I/O load requests between clients and servers and to handle multiple striping patterns in files. We evaluate our proposed system on an experimental cluster for two common use cases: the synthetic I/O benchmark IOR and the scientific application I/O kernel HACC-I/O. We also use a discrete-time simulator with real HPC application traces from emerging workloads running on the Summit supercomputer to validate the effectiveness and scalability of Tarazu in large-scale storage environments. The results show improvements in load balancing and read performance of up to \(33\% \) and \(43\% \) percent, respectively, compared to the state of the art.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture

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