Compiling synchronous languages to optimal move code for exposed datapath architectures-Reference-Cited by-同舟云学术

Compiling synchronous languages to optimal move code for exposed datapath architectures

Published:2020-05-25 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 23th International Workshop on Software and Compilers for Embedded Systems
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Author:

Dahlem Marc¹,Schneider Klaus²

Affiliation:

1. Insiders Technologies GmbH, Kaiserslautern, Germany

2. University of Kaiserslautern, Kaiserslautern, Germany

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3378678.3391877

Reference45 articles.

1. The synchronous languages 12 years later

2. A. Bhagyanath T. Jain and K. Schneider. 2016. Towards Code Generation for the Synchronous Control Asynchronous Dataflow (SCAD) Architectures. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) R. Wimmer (Ed.). University of Freiburg Freiburg Germany 77--88. A. Bhagyanath T. Jain and K. Schneider. 2016. Towards Code Generation for the Synchronous Control Asynchronous Dataflow (SCAD) Architectures. In Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV) R. Wimmer (Ed.). University of Freiburg Freiburg Germany 77--88.

3. A. Bhagyanath and K. Schneider. 2016. Optimal Compilation for Exposed Datapath Architectures with Buffered Processing Units by SAT Solvers. In Formal Methods and Models for Codesign (MEMOCODE) E. Leonard and K. Schneider (Eds.). IEEE Computer Society Kanpur India 143--152. A. Bhagyanath and K. Schneider. 2016. Optimal Compilation for Exposed Datapath Architectures with Buffered Processing Units by SAT Solvers. In Formal Methods and Models for Codesign (MEMOCODE) E. Leonard and K. Schneider (Eds.). IEEE Computer Society Kanpur India 143--152.

4. A. Bhagyanath and K. Schneider. 2017. Exploring Different Execution Paradigms in Exposed Datapath Architectures with Buffered Processing Units. In International Conference on Embedded Computer Systems: Architectures Modeling and Simulation (SAMOS) Y. Patt and S.K. Nandy (Eds.). IEEE Computer Society Samos Greece 1--10. A. Bhagyanath and K. Schneider. 2017. Exploring Different Execution Paradigms in Exposed Datapath Architectures with Buffered Processing Units. In International Conference on Embedded Computer Systems: Architectures Modeling and Simulation (SAMOS) Y. Patt and S.K. Nandy (Eds.). IEEE Computer Society Samos Greece 1--10.

5. A. Bhagyanath and K. Schneider. 2017. Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units. In Application of Concurrency to System Design (ACSD) A. Legay and K. Schneider (Eds.). IEEE Computer Society Zaragoza Spain 106--115. A. Bhagyanath and K. Schneider. 2017. Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units. In Application of Concurrency to System Design (ACSD) A. Legay and K. Schneider (Eds.). IEEE Computer Society Zaragoza Spain 106--115.