A 1.2-V, 1.8-GHz low-power PLL using a class-F VCO for driving 900-MHz SRD band SC-circuits
Author:
Affiliation:
1. Johannes Kepler University Linz, Linz, Austria
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3370748.3406551
Reference19 articles.
1. A Wideband Receiver With Resonant Multi-Phase LO and Current Reuse Harmonic Rejection Baseband
2. Michel Azarian Sr. 2013. A simple method to accurately predict PLL reference spur levels due to leakage current. Linear Technologie App. Note (2013) 1--8. Michel Azarian Sr. 2013. A simple method to accurately predict PLL reference spur levels due to leakage current. Linear Technologie App. Note (2013) 1--8.
3. A Class-F CMOS Oscillator
4. Dean Banerjee. 2006. PLL performance simulation and design. Dog Ear Publishing. Dean Banerjee. 2006. PLL performance simulation and design. Dog Ear Publishing.
5. A CMOS low-noise low-power quadrature LC oscillator
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