On Attacking Locking SIB based IJTAG Architecture

Author:

Kumar Gaurav1,Riaz Anjum1,Prasad Yamuna1,Ahlawat Satyadev1

Affiliation:

1. Indian Institute of Technology Jammu, Jammu, India

Funder

Science and Engineering Research Board

Publisher

ACM

Reference14 articles.

1. . IEEE Standard for Test Access Port and Boundary-Scan Architecture;IEEE Std,2013

2. 2014. IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device . IEEE Std 1687-- 2014 (2014), 1--283. https://doi.org/10.1109/IEEESTD.2014.6974961 2014. IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device. IEEE Std 1687--2014 (2014), 1--283. https://doi.org/10.1109/IEEESTD.2014.6974961

3. Preventing Scan Attack through Test Response Encryption

4. Fine-Grained Access Management in Reconfigurable Scan Networks

5. Board security enhancement using new locking SIB-based architectures

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. On Protecting IJTAG using an Inherently Secure SIB;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16

2. A New Access Protocol for Elevating the Security of IJTAG Network;2022 IEEE 31st Asian Test Symposium (ATS);2022-11

3. Power Analysis Attack on Locking SIB based IJTAG Achitecture;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03

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