Error Resilient In-Memory Computing Architecture for CNN Inference on the Edge
Author:
Affiliation:
1. École Polytechnique Fédérale de Lausanne, Lausanne, Switzerland
Funder
ERC Consolidator Grant COMPUSAPIEN
EC H2020 FVLLMONTI
Swiss NSF ML-Edge RTD
EC H2020 WiPLASH
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3526241.3530351
Reference27 articles.
1. K. C. Akyel etal 2016. DRC2: Dynamically Reconfigurable Computing Circuit based on memory architecture. IEEE ICRC. K. C. Akyel et al. 2016. DRC2: Dynamically Reconfigurable Computing Circuit based on memory architecture. IEEE ICRC.
2. M. Amin-Naji et al . 2019 . Ensemble of CNN for multi-focus image fusion. Elsevier , Information Fusion. M. Amin-Naji et al. 2019. Ensemble of CNN for multi-focus image fusion. Elsevier, Information Fusion.
3. D. Bortolotti etal 2014. Approximate compressed sensing: Ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor. ISLPED. D. Bortolotti et al. 2014. Approximate compressed sensing: Ultra-low power biosignal processing via aggressive voltage scaling on a hybrid memory multi-core processor. ISLPED.
4. G. Burr etal 2015. Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element. IEEE TED. G. Burr et al. 2015. Experimental demonstration and tolerancing of a large-scale neural network (165 000 synapses) using phase-change memory as the synaptic weight element. IEEE TED.
5. Eyeriss
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