SMASH
Author:
Affiliation:
1. ETH Zürich
2. Carnegie Mellon University and ETH Zürich
3. ETH Zürich and National Technical University of Athens
4. ETH Zürich and Carnegie Mellon University
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3352460.3358286
Reference99 articles.
1. Intel Math Kernel Library. http://software.intel.com/en-us/articles/intel-mkl/ Intel Math Kernel Library. http://software.intel.com/en-us/articles/intel-mkl/
2. Intel Xeon Gold 5118. https://ark.intel.com/content/www/us/en/ark/products/120473/intel-xeon-gold-5118-processor-16-5m-cache-2-30-ghz.html. Intel Xeon Gold 5118. https://ark.intel.com/content/www/us/en/ark/products/120473/intel-xeon-gold-5118-processor-16-5m-cache-2-30-ghz.html.
3. SMASH code. https://github.com/CMU-SAFARI/SMASH SMASH code. https://github.com/CMU-SAFARI/SMASH
4. J. Ahn S. Hong S. Yoo O. Mutlu and K. Choi "A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing " in ISCA 2015. J. Ahn S. Hong S. Yoo O. Mutlu and K. Choi "A Scalable Processing-in-Memory Accelerator for Parallel Graph Processing " in ISCA 2015.
5. J. Ahn S. Yoo O. Mutlu and K. Y. Choi "PIM-Enabled Instructions: A Low-Overhead Locality-Aware Processing-in-Memory Architecture " 2015. J. Ahn S. Yoo O. Mutlu and K. Y. Choi "PIM-Enabled Instructions: A Low-Overhead Locality-Aware Processing-in-Memory Architecture " 2015.
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