Protective redundancy overhead reduction using instruction vulnerability factor

Author:

Borodin Demid,Juurlink Ben H.H.

Publisher

ACM Press

Cited by 32 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. BiGResi: Robust bit-level fault injection framework for assessing intrinsic software resilience against soft errors;Computers and Electrical Engineering;2024-05

2. TCC: GPGPU Architecture for Instruction Decoder and Control Flow Error Detection;2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS);2024-04-03

3. gemV-tool: A Comprehensive Soft Error Reliability Estimation Tool for Design Space Exploration;Electronics;2023-11-08

4. Braum: Analyzing and Protecting Autonomous Machine Software Stack;2022 IEEE 33rd International Symposium on Software Reliability Engineering (ISSRE);2022-10

5. Quantifying the impact of data replication on error propagation;Cluster Computing;2022-09-13

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