Noise-aware DVFS transition sequence optimization for battery-powered IoT devices
Author:
Affiliation:
1. Zhejiang University, Hangzhou, China
2. Google Inc.
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3195970.3196080
Reference26 articles.
1. PVT-aware digital controlled voltage regulator design for ultra-low-power (ULP) DVFS systems;Wu P.;Proc. SoCC,2014
2. Power Supply Noise in SoCs: Metrics, Management, and Measurement
3. Distributed DVFS using rationally-related frequencies and discrete voltage levels
4. Reducing power in high-performance microprocessors
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