A machine learning based hard fault recuperation model for approximate hardware accelerators
Author:
Affiliation:
1. The University of Texas at Dallas
2. Cal Poly State University
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3195970.3195974
Reference27 articles.
1. M.-L. Li P. Ramachandran S. K. Sahoo S. V. Adve V. S. Adve and Y. Zhou "Trace-based Microarchitecture-level Diagnosis of Permanent Hardware Faults " in International Conference on Dependable Systems and Networks (DSN) 2008. M.-L. Li P. Ramachandran S. K. Sahoo S. V. Adve V. S. Adve and Y. Zhou "Trace-based Microarchitecture-level Diagnosis of Permanent Hardware Faults " in International Conference on Dependable Systems and Networks (DSN) 2008.
2. S. Borkar "Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation " IEEE Micro 2005. 10.1109/MM.2005.110 S. Borkar "Designing Reliable Systems from Unreliable Components: The Challenges of Transistor Variability and Degradation " IEEE Micro 2005. 10.1109/MM.2005.110
3. M. Stanisavljević A. Schmid and Y. Leblebici "Reliability Faults and Fault Tolerance " in Reliability of Nanoscale Circuits and Systems 2011. M. Stanisavljević A. Schmid and Y. Leblebici "Reliability Faults and Fault Tolerance " in Reliability of Nanoscale Circuits and Systems 2011.
4. I. Koren and Z. Koren "Defect Tolerance in VLSI circuits: Techniques and Yield Analysis " Proceedings of the IEEE 1998. I. Koren and Z. Koren "Defect Tolerance in VLSI circuits: Techniques and Yield Analysis " Proceedings of the IEEE 1998.
5. Fault tolerance in VLSI circuits
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