Affiliation:
1. Stanford University, California
Abstract
This paper focuses on the trade-off between flexibility and efficiency in specialized computing. We observe that specialized units achieve most of their efficiency gains by tuning data storage and compute structures and their connectivity to the data-flow and data-locality patterns in the kernels. Hence, by identifying key data-flow patterns used in a domain, we can create efficient engines that can be programmed and reused across a wide range of applications.
We present an example, the Convolution Engine (CE), specialized for the convolution-like data-flow that is common in computational photography, image processing, and video processing applications. CE achieves energy efficiency by capturing data reuse patterns, eliminating data transfer overheads, and enabling a large number of operations per memory access. We quantify the tradeoffs in efficiency and flexibility and demonstrate that CE is within a factor of 2-3x of the energy and area efficiency of custom units optimized for a single kernel. CE improves energy and area efficiency by 8-15x over a SIMD engine for most applications.
Funder
Defense Advanced Research Projects Agency
Publisher
Association for Computing Machinery (ACM)
Reference31 articles.
1. Digic Processors Canon Inc. http://learn.usa.canon.com/resources-/articles/2012/digic_processors.htmlp. Digic Processors Canon Inc. http://learn.usa.canon.com/resources-/articles/2012/digic_processors.htmlp.
2. Omap 5 platform texas instruments www.ti.com/omap. Omap 5 platform texas instruments www.ti.com/omap.
3. Snapdragon Processors Qualcomm Inc. http://www.qualcomm.com/snapdragon/processors. Snapdragon Processors Qualcomm Inc. http://www.qualcomm.com/snapdragon/processors.
4. Tegra processors. NVIDIA Corporation. Tegra processors. NVIDIA Corporation.
5. The Frankencamera
Cited by
16 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Hardware-Software Co-Design of a Collaborative DNN Accelerator for 3D Stacked Memories with Multi-Channel Data;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
2. Design and Implementation of 2D Convolution on x86/x64 Processors;IEEE Transactions on Parallel and Distributed Systems;2022-12-01
3. Crescent;Proceedings of the 49th Annual International Symposium on Computer Architecture;2022-06-11
4. Sanger: A Co-Design Framework for Enabling Sparse Attention using Reconfigurable Architecture;MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture;2021-10-17
5. Evaluating the Impact of Fault-Tolerance Capability of Deep Neural Networks Caused by Faults;2021 IEEE 34th International System-on-Chip Conference (SOCC);2021-09-14