AN5D: automated stencil framework for high-degree temporal blocking on GPUs-Reference-Cited by-同舟云学术

AN5D: automated stencil framework for high-degree temporal blocking on GPUs

Published:2020-02-21 Issue: Volume: Page:
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Container-title:Proceedings of the 18th ACM/IEEE International Symposium on Code Generation and Optimization
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Author:

Matsumura Kazuaki¹,Zohouri Hamid Reza²,Wahib Mohamed³,Endo Toshio⁴,Matsuoka Satoshi⁵

Affiliation:

1. Barcelona Supercomputing Center, Spain

2. Edgecortix, Japan

3. AIST, Japan

4. Tokyo Institute of Technology, Japan

5. RIKEN CCS, Japan

Funder

Core Research for Evolutional Science and Technology

Publisher

ACM

Link

Reference41 articles.

1. Diamond Tiling: Tiling Techniques to Maximize Parallelism for Stencil Computations;Bondhugula Uday;IEEE Trans. Parallel Distrib. Syst.,2017

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