Hardware synthesis of high-level C constructs
Author:
Affiliation:
1. TEI of Western Macedonia, Fourka Area, Kastoria, Greece
2. University of Thessaly, Volos, Greece
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2801948.2802029
Reference13 articles.
1. Dynamic Memory Access Management for High-Performance DSP Applications Using High-Level Synthesis
2. Coordinated parallelizing compiler optimizations and high-level synthesis
3. Introduction to the scheduling problem
4. A Formal Design Framework to Generate Coprocessors with Implementation Options. In International Journal of Research and Reviews in Computer Science (IJRRCS, ISSN: 2079-2557). Science Academy Publisher;Dossis M. F;United Kingdom,2011
5. Force-directed scheduling for the behavioral synthesis of ASICs
Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. OpenMP-Based Approach for High Level C Loops Synthesis;International Journal of Software Innovation;2017-01
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