The development of the MU5 computer system

Author:

Ibbett R. N.1,Capon P. C.1

Affiliation:

1. Univ. of Manchester, Manchester, UK

Abstract

Following a brief outline of the background of the MU5 project, the aims and ideas for MU5 are discussed. A description is then given of the instruction set, which includes a number of features conducive to the production of efficient compiled code from high-level language source programs. The design of the processor is then traced from the initial ideas for an associatively addressed “name store” to the final multistage pipeline structure involving a prediction mechanism for instruction prefetching and a function queue for array element accessing. An overall view of the complete MU5 complex is presented together with a brief indication of its performance.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Cited by 20 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Modeling an Asynchronous Microprocessor;SIMULATION;2003-07

2. Distributed Simulation of Asynchronous Hardware: The Program Driven Synchronization Protocol;Journal of Parallel and Distributed Computing;2002-04

3. Simulating asynchronous hardware on multiprocessor platforms: the case of AMULET1;Concurrency and Computation: Practice and Experience;2001

4. Modelling and distributed simulation of asynchronous hardware;Simulation Practice and Theory;2000-03

5. The University of Manchester MU5 project;IEEE Annals of the History of Computing;1999

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