Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA-Reference-Cited by-同舟云学术

Hardware Acceleration of the Tracking Learning Detection (TLD) Algorithm on FPGA

Published:2017-09-05 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 11th International Conference on Distributed Smart Cameras
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Author:

Abdali El Mehdi¹,Hanniche Abderrahmane Walid²,Pelcat Maxime³,Diguet Jean-Philippe⁴,Berry François¹

Affiliation:

1. Institut Pascal, Aubière, France

2. Université Clermont-Auvergne, Aubière, France

3. INSA Rennes, Institut Pascal, Rennes and Aubière, France

4. Lab-STICC, Lorient, France

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3131885.3131933

Reference19 articles.

1. N. Wang and D.-Y. Yeung "Learning a deep compact image representation for visual tracking " in Advances in neural information processing systems 2013 pp. 809--817. N. Wang and D.-Y. Yeung "Learning a deep compact image representation for visual tracking " in Advances in neural information processing systems 2013 pp. 809--817.

2. Learning multi-domain convolutional neural networks for visual tracking;Nam H.;Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition,2016

3. Z. Kalal K. Mikolajczyk and J. Matas "Tracking-learning-detection " IEEE transactions on pattern analysis and machine intelligence vol. 34 no. 7 pp. 1409--1422 2012. 10.1109/TPAMI.2011.239 Z. Kalal K. Mikolajczyk and J. Matas "Tracking-learning-detection " IEEE transactions on pattern analysis and machine intelligence vol. 34 no. 7 pp. 1409--1422 2012. 10.1109/TPAMI.2011.239

4. Visual Tracking with Fully Convolutional Networks

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