120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board-Reference-Cited by-同舟云学术

120-core microAptiv MIPS Overlay for the Terasic DE5-NET FPGA board

Published:2017-02-22 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
language:
Short-container-title:

Author:

Kumar H B Chethan¹,Ravi Prashant¹,Modi Gourav¹,Kapre Nachiket²

Affiliation:

1. Nanyang Technological University, Singapore, Singapore

2. University of Waterloo, Waterloo, ON, Canada

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3020078.3021751

Reference14 articles.

1. GRVI phalanx: A massively parallel RISC-V FPGA accelerator accelerator;Gray J.;CoRR,2016

2. MIPS

3. MIPSfpga: Hands-on learning on a commercial soft-core

4. R. Owen "Mipsfpga university program " https://community.imgtec.com/university/. R. Owen "Mipsfpga university program " https://community.imgtec.com/university/.

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 475 MHz Manycore FPGA Accelerator for RTL Simulation;Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2024-04

2. Virtual Coordinate System Based on a Circulant Topology for Routing in Networks-On-Chip;Symmetry;2024-01-21

3. OverGen: Improving FPGA Usability through Domain-specific Overlay Generation;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

4. The Usage of a Simple SchoolMIPS Soft-Processor Core for Teaching Students the Computer Microarchitecture;2022 International Conference on Quality Management, Transport and Information Security, Information Technologies (IT&QM&IS);2022-09-26

5. Implementation of the RISC-V Architecture with the Extended Zbb Instruction Set;2022 International Ural Conference on Electrical Power Engineering (UralCon);2022-09-23