Author:
Ryzhenko Nikolai,Burns Steven
Cited by
18 articles.
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1. Automatic Standard Cell Layout Generator Integrated with Design Expertise;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. Migrating Standard Cells for Multiple Drive Strengths by Routing Imitation;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
3. TransPlace: A Scalable Transistor-Level Placer for VLSI Beyond Standard-Cell-Based Design;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
4. Models in the Process of Designing Complex Microelectronic Objects under Conditions of Uncertainty;2023 XXVI International Conference on Soft Computing and Measurements (SCM);2023-05-24
5. On Generating Cell Library in Advanced Nodes: Efforts and Challenges;2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT);2023-04-17