Architectural tradeoff in implementing RSA processors

Author:

Chang Fu-Chi1,Wang Chia-Jiu1

Affiliation:

1. University of Colorado at Colorado Springs, Colorado Springs, CO

Abstract

An investigation of a suite of RSA processors using different exponentiation and modular arithmetic algorithms is the main theme of this paper. The execution time and the amount of hardware required of different algorithms used to implement the RSA processor are compared. The modular algorithms examined in this paper are classical modular algorithm, Barrett's modular algorithm, Hensel's odd division and Montgomery's modular algorithm. The exponentiation algorithms implemented are the left-to-right binary method, the right-to-left binary method, the Chinese remainder theorem. This work finds that the fast RSA processor is the one using the Chinese remainder theorem with right to left scan for exponentiation operations and Barrett's algorithm for modular arithmetic operations. The RSA processor using least amount of hardware is the one using the left-o-right binary method for exponentiation operations and Montgomery's algorithm for modular operations.

Publisher

Association for Computing Machinery (ACM)

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Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A high performance ROM-based structure for modular exponentiation;Computers & Electrical Engineering;2011-05

2. Revisiting Sum of Residues Modular Multiplication;Journal of Electrical and Computer Engineering;2010

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