Author:
Seshadri Vivek,Mutlu Onur,Kozuch Michael A.,Mowry Todd C.
Cited by
48 articles.
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1. Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
2. A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
3. Leveraging Replacement Algorithm for Improved Cache Management System;Wireless Personal Communications;2024-03
4. Boustrophedonic Frames: Quasi-Optimal L2 Caching for Textures in GPUs;2023 32nd International Conference on Parallel Architectures and Compilation Techniques (PACT);2023-10-21
5. CARE: A Concurrency-Aware Enhanced Lightweight Cache Management Framework;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02