Hardware Trojan Detection using Transition Probability with Minimal Test Vectors

Abstract

Hardware Trojans (HTs) are malicious manipulations of the standard functionality of an integrated circuit (IC). Sophisticated defense against HT attacks has become the utmost current research endeavor. In particular, the HTs whose operations depend on the rare activation condition are the most critical ones. Among other techniques, logic test by rare net excitation is advocated as one of the viable detection methods due to no extra hardware requirement. However, logic test faces a tremendous challenge of the overhead of testing configuration. This work presents a methodology based on the primary input’s impact over rare nets using transition probability to select the useful test vectors. To generate a test vector, each input’s toggle probability is calculated, which drastically minimizes the search space. The capability of rare-signal generation selects the final list of test vectors. Simulations performed in the presence of different HT triggers on different benchmark circuits, like ISCAS ’85, ISCAS ’89, and ITC ’99, show that the proposed methodology is capable of producing test vectors with significantly improved rare net coverage. Furthermore, compared to an existing technique, the proposed methodology produces average higher rare switching (around 72%) inside a netlist.