Design Rule Checking with a CNN Based Feature Extractor

Author:

Francisco Luis1,Lagare Tanmay1,Jain Arpit1,Chaudhary Somal1,Kulkarni Madhura1,Sardana Divya1,Davis W. Rhett1,Franzon Paul1

Affiliation:

1. North Carolina State University, Raleigh , NC, USA

Funder

CAEML IUCRC

National Science Foundation

Publisher

ACM

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Performance Analysis of Different Processor Architectures Applied to CMP Process Modeling Acceleration;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

2. OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

3. A Deep Transfer Learning Design Rule Checker With Synthetic Training;IEEE Design & Test;2023-02

4. Automated Design Rule Checker for VLSI Circuits Using Machine Learning;VLSI, Communication and Signal Processing;2023

5. Machine Learning Approaches for Electronic Design Automation in IC Design Flow;2022 Sixth International Conference on I-SMAC (IoT in Social, Mobile, Analytics and Cloud) (I-SMAC);2022-11-10

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