Affiliation:
1. CSCE Department, University of Arkansas, Fayetteville, Arkansas, USA
Abstract
Design verification takes 80 % of times in the flow design of hardware/software applications. To reduce this duration, subsequent transformations are performed across different levels of abstraction until the final implementation. We propose a rapid prototyping camera system based on FPGAs, which allows designs to be explored and evaluated in realistic environments. Our focus is on the design of a generic embedded hardware/software architecture with a symbolic representation of the input application to allow a programmability at a very high abstraction level. The hardware/software partitioning is facilitated through the integration of OpenCV and SystemC in the same environment for rapid simulation and OpenCV and Linux in the run-time environment.
Publisher
Association for Computing Machinery (ACM)
Reference4 articles.
1. SystemC/TLM http://www.accellera.org/downloads/standards/systemc SystemC/TLM http://www.accellera.org/downloads/standards/systemc
2. OpencCV http://opencv.org/ OpencCV http://opencv.org/
3. A testbench specification language for SystemC verification
4. The system verification methodology for advanced TLM verification
Cited by
1 articles.
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