Cross-layer Exploration of 2.5D Energy-Efficient Heterogeneous Chiplets Integration: From System Simulation to Open Hardware

Author:

Burdina Anna1ORCID,Catel Torres Gabriel2ORCID,Schiavone Davide1ORCID,Peón-Quirós Miguel1ORCID,Ansaloni Giovanni1ORCID,Atienza David1ORCID,Zapater Marina2ORCID

Affiliation:

1. École Polytechnique Fédérale de Lausanne (EPFL), Lausanne, Switzerland

2. Haute Ecole Spécialisée de Suisse Occidentale (HES-SO), Yverdon-Les-Bains, Switzerland

Publisher

ACM

Reference10 articles.

1. Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs

2. Tim Fischer. 2024. Serial Link Docs. https://github.com/pulp-platform/serial_link/tree/main/doc Accessed: 2024-07-03.

3. Near-Threshold RISC-V Core With DSP Extensions for Scalable IoT Endpoint Devices

4. LowRISC. [n. d.]. OpenTitan. https://github.com/lowRISC/opentitan

5. Simone Machetti, Pasquale Davide Schiavone, Thomas Christoph Müller, Miguel Peón-Quirós, and David Atienza. 2024. X-HEEP: An open-source, configurable and extendible RISC-V microcontroller for the exploration of ultra-low-power edge accelerators. arXiv preprint arXiv:2401.05548 (2024).

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