Author:
Yiannacouras Peter,Steffan J. Gregory,Rose Jonathan
Cited by
22 articles.
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1. Reconfigurable Edge Hardware for Intelligent IDS: Systematic Approach;Lecture Notes in Computer Science;2024
2. FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler;ACM Transactions on Architecture and Code Optimization;2023-12-14
3. Resource-efficient RISC-V Vector Extension Architecture for FPGA-based Accelerators;Proceedings of the 13th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies;2023-06-14
4. SPARROW: A Low-Cost Hardware/Software Co-designed SIMD Microarchitecture for AI Operations in Space Processors;2022 Design, Automation & Test in Europe Conference & Exhibition (DATE);2022-03-14
5. A Soft RISC-V Vector Processor for Edge-AI;2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID);2022-02