Affiliation:
1. Computer Science and Engineering, Indian Institute of Information Technology Guwahati, Guwahati, India
2. IIT Guwahati, Guwahati, India
Abstract
With the rising demands for high capacity memory and poor scalability of the existing DRAM-based main memories, the emerging Non-volatile memories captures higher attention due to their high density and low leakage power consumption. However, the possible consideration of such memories as alternatives of DRAM is largely hindered by their intrinsic drawbacks like high write latency, high write energy and low write endurance. In this paper, we propose an integrated solution by combining the effect of compression and encoding assisted block placement to improve lifetime of NVMs. We have developed a compression technique called
LUT_Comp
by exploiting the word-level redundancy present in the words of the incoming cache blocks to NVM.
LUT_Comp
remains effective in reducing bit-flips in NVMs by offering a balance in compression ratio and coverage. Additionally, we also propose an encoding based block placement policy that places the compressed blocks in the appropriate half within the memory. The integrated approach of compression and block placement termed AmLuCEP offers a uniform bit-flips distribution while further reducing bit-flips in NVM. Experimental results show that AmLuCEP reduces bit-flips by 54%, 42%, 37%, 21%; energy consumption by 41%, 28%, 24%, 13%; and improves lifetime by 57%, 40%, 38%, 21% over baseline and the existing techniques READ [38], COEF [39] and SELEC [13], respectively.
Publisher
Association for Computing Machinery (ACM)