Design Space Exploration of TAGE Branch Predictor with Ultra-Small RAM

Author:

Zhou Chaobing1,Huang Libo1,Li Zhisheng1,Zhang Tan1,Dou Qiang1

Affiliation:

1. National University of Defense Technology, Changsha, China

Funder

NSFC

Publisher

ACM

Reference14 articles.

1. ARM. Cortex-a15 mpcore technical reference manual revision:r3p3. In http://infocenter.arm.com/help/index.jsp. ARM. Cortex-a15 mpcore technical reference manual revision:r3p3. In http://infocenter.arm.com/help/index.jsp.

2. Design Space Exploration of Hybrid Ultra Low Power Branch Predictors

3. Towards an energy efficient branch prediction scheme using profiling, adaptive bias measurement and delay region scheduling

4. Dynamically sizing the tage branch predictor;Pruett S.;CBP,2016

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1. Optimizing Value Prediction for Ilp Processors: A Design Space Exploration Approach;2024

2. The Basic Design Space of Out-of-Order Execution in CPU Cores;Topics in Intelligent Engineering and Informatics;2024

3. Improving Branch Prediction Accuracy on Multi-Core Architectures for Big Data;2018 IEEE Intl Conf on Parallel & Distributed Processing with Applications, Ubiquitous Computing & Communications, Big Data & Cloud Computing, Social Computing & Networking, Sustainable Computing & Communications (ISPA/IUCC/BDCloud/SocialCom/SustainCom);2018-12

4. Effective Optimization of Branch Predictors through Lightweight Simulation;2017 IEEE International Conference on Computer Design (ICCD);2017-11

5. Improving Branch Prediction for Thread Migration on Multi-core Architectures;Lecture Notes in Computer Science;2017

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