A Mixed-Size Monolithic 3D Placer with 2D Layout Inheritance
Author:
Affiliation:
1. Hunan University & National University of Defense Technology, Changsha, China
2. National University of Defense Technology, Changsha, China
3. Delft University of Technology, Delft, Netherlands
Funder
National Natural Science Foundation of China
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3060403.3060411
Reference23 articles.
1. Exploiting die-to-die thermal coupling in 3D IC placement;Athikulwongse K.;TVLSI,2012
2. Advances in 3D CMOS sequential integration
3. An efficient approach to multilayer layer assignment with an application to via minimization
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