Towards Efficient SpMV on Sunway Manycore Architectures

Author:

Liu Changxi1,Xie Biwei2,Liu Xin3,Xue Wei4,Yang Hailong1,Liu Xu5

Affiliation:

1. School of Computer Science and Engineering, Beihang University, China

2. State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences, University of Chinese, Academy of Sciences, China

3. National Research Centre of Parallel Computer Engineering and Technology, China

4. Department of Computer Science and Technology, Tsinghua University, China

5. Department of Computer Science, College of William and Mary, USA

Funder

National Natural Science Foundation of China

National Key R&D Program of China

Publisher

ACM

Cited by 42 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Optimizing SpMV on Heterogeneous Multi-Core DSPs through Improved Locality and Vectorization;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12

2. SaSpGEMM: Sorting-Avoiding Sparse General Matrix-Matrix Multiplication on Multi-Core Processors;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12

3. CAMLB-SpMV: An Efficient Cache-Aware Memory Load-Balancing SpMV on CPU;Proceedings of the 53rd International Conference on Parallel Processing;2024-08-12

4. Building a domain-specific compiler for emerging processors with a reusable approach;Science China Information Sciences;2023-12-27

5. ReFloat: Low-Cost Floating-Point Processing in ReRAM for Accelerating Iterative Linear Solvers;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2023-11-11

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