Boolean Circuit Camouflage-Reference-Cited by-同舟云学术

Boolean Circuit Camouflage

Published:2017-11-03 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2017 Workshop on Attacks and Solutions in Hardware Security
language:
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Author:

Di Crescenzo Giovanni¹,Rajendran Jeyavijayan²,Karri Ramesh³,Memon Nasir³

Affiliation:

1. Vencore Labs, Basking Ridge, NJ & NYU Tandon School of Engineering, Brooklyn, NY, USA

2. Texas A&M University, College Station, TX & NYU Tandon School of Engineering, Brooklyn, NY, USA

3. NYU Tandon School of Engineering, Brooklyn, NY, USA

Funder

Army Research Office

National Science Foundation

Defense Advanced Research Projects Agency

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3139324.3139331

Reference32 articles.

1. Practical Implementation of Lattice-Based Program Obfuscators for Point Functions

2. On the (im)possibility of obfuscating programs

3. James P. Baukus Lap-Wai Chow Jr. William M. Clark and Gavin J. Harbison. 2012. Conductive channel pseudo block process and circuit to inhibit reverse engineering. US Patent no. 8258583 (2012). James P. Baukus Lap-Wai Chow Jr. William M. Clark and Gavin J. Harbison. 2012. Conductive channel pseudo block process and circuit to inhibit reverse engineering. US Patent no. 8258583 (2012).

4. James P. Baukus Lap Wai Chow and William Clark. 2002. Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide. US Patent no. 20020096776 (2002). James P. Baukus Lap Wai Chow and William Clark. 2002. Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide. US Patent no. 20020096776 (2002).

5. James P. Baukus Lap Wai Chow Ronald P. Cocchi Paul Ouyang and Bryan J. Wang. 2012. Building block for a secure CMOS logic cell library. US Patent no. 8111089 (2012). James P. Baukus Lap Wai Chow Ronald P. Cocchi Paul Ouyang and Bryan J. Wang. 2012. Building block for a secure CMOS logic cell library. US Patent no. 8111089 (2012).

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