The semantics of transactions and weak memory in x86, Power, ARM, and C++-Reference-Cited by-同舟云学术

The semantics of transactions and weak memory in x86, Power, ARM, and C++

Published:2018-06-11 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 39th ACM SIGPLAN Conference on Programming Language Design and Implementation
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Author:

Chong Nathan¹,Sorensen Tyler²,Wickerson John²

Affiliation:

1. ARM, UK

2. Imperial College London, UK

Funder

EPSRC

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3192366.3192373

Reference54 articles.

1. Verification of Transactional Memory in POWER8

2. Weak ordering---a new definition

3. Jade Alglave Luc Maranget Susmit Sarkar and Peter Sewell. 2010. Fences in Weak Memory Models. In Computer Aided Verification (CAV). 10.1007/978-3-642-14295-6_25 Jade Alglave Luc Maranget Susmit Sarkar and Peter Sewell. 2010. Fences in Weak Memory Models. In Computer Aided Verification (CAV). 10.1007/978-3-642-14295-6_25

4. Herding Cats

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