Formal verification of cryptographic circuits

Author:

Bitat Abir1,merniz Salah1

Affiliation:

1. MISC laboratory, IFA department, Abdelhamid Mehri university 2 of Constantine

Publisher

ACM Press

Reference17 articles.

1. K. Wong, M. Wark, and E. Dawson, "A single-chip FPGA implementation of the data encryption standard (DES) algorithm. In Global Telecommunications Conference," The Bridge to Global Integration. IEEE (Vol. 2, pp. 827--832). 1998.

2. D. Toma, "VÃl'rification Formelle des systÃĺmes numÃl'riques par dÃl'monstration de thÃl'orÃĺmes: application aux composants cryptographiques" (Doctoral dissertation, UniversitÃl' Joseph-Fourier-Grenoble I).2006.

3. N. Homma, K. Saito,and T. Aoki "A Formal Approach to Designing Cryptographic Processors Based on GF (2m) Arithmetic Circuits," IEEE Transactions on Information Forensics and Security, 7(1), 3--13. 2012.

4. J. Lewis "Cryptol: specification, implementation and verification of high-grade cryptographic applications," In Proceedings of the 2007 ACM workshop on Formal methods in security engineering (pp. 41--41). 2007.

5. D. Wolfs, K.Aerts, J. Moelans, and N. Mentens, "Design automation for cryptographic hardware using functional languages". In Proceedings of the 32nd WIC Symposium on Information Theory in the Benelux (pp. 194--201). Werkgemeen-schap voor Informatie-en Communicatietheorie.2011.

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1. Deductive Formal Verification of Synthesizable, Transaction-Level Hardware Designs Using Coq;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

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