TCONMAP

Author:

Heyse Karel1,Al Farisi Brahim1,Bruneel Karel1,Stroobandt Dirk1

Affiliation:

1. Ghent University, Gent, Belgium

Abstract

Parameterised configurations are FPGA configuration bitstreams in which the bits are defined as functions of user-defined parameters. From a parameterised configuration, it is possible to quickly and efficiently derive specialised, regular configuration bitstreams by evaluating these functions. The specialised bitstreams have different properties and functionality depending on the chosen values of the parameters. The most important application of parameterised configurations is the generation of specialised configuration bitstreams for Dynamic Circuit Specialisation, a technique for optimising circuits at runtime using partial reconfiguration of the FPGA. Generating and using parameterised configurations requires a new FPGA tool flow. In this article, we present a new technology mapping algorithm for parameterised designs, called TCONMAP, that can be used to produce parameterised configurations in which both the configuration of the logic blocks and routing is a function of the parameters. In our experiments, we demonstrate that in using TCONMAP, the depth and area of the mapped circuit is close to the minimal depth and area attainable. Both Dynamic Circuit Specialisation and fine-grained modular reconfiguration are extracted by TCONMAP from the HDL description of the design requiring only simple parameter annotations.

Funder

European Commission in the context of the FP7 FASTER project

Flemish Fund for Scientific Research

Agency for Innovation through Science and Technology in Flanders

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. In-Circuit Debugging with Dynamic Reconfiguration of FPGA Interconnects;ACM Transactions on Reconfigurable Technology and Systems;2020-03-31

2. In-circuit fault tolerance for FPGAs using dynamic reconfiguration and virtual overlays;Microelectronics Reliability;2019-11

3. A Fully Parameterized Virtual Coarse Grained Reconfigurable Array for High Performance Computing Applications;2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2016-05

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