Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions-Reference-Cited by-同舟云学术

Devise Rust Compiler Optimizations on RISC-V Architectures with SIMD Instructions

Published:2019-08-05 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 48th International Conference on Parallel Processing: Workshops
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Author:

Lin Heng¹,Chen Piyo¹,Hwang Yuan-Shin²,Lee Jenq-Kuen¹

Affiliation:

1. Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan

2. Dept. of Computer Science and Information Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3339186.3339193

Reference15 articles.

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3. 2010. RISC-V. https://riscv.org/. 2010. RISC-V. https://riscv.org/.

4. 2016. IRON: An Extensible Concurrent Web Framework for Rust. http://ironframework.io/. 2016. IRON: An Extensible Concurrent Web Framework for Rust. http://ironframework.io/.

5. 2017. Rust for the hifive(RV32LMAC) board. https://github.com/riscv-rust/riscv-rust-toolchain. 2017. Rust for the hifive(RV32LMAC) board. https://github.com/riscv-rust/riscv-rust-toolchain.

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