CHARSTAR
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, University of Wisconsin, Madison
Funder
National Science Foundation
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3079856.3080212
Reference68 articles.
1. The gem5 simulator
2. Coordinated management of multiple interacting resources in chip multiprocessors: A machine learning approach
3. Power-aware microarchitecture: design and modeling challenges for next-generation microprocessors
4. A circuit level implementation of an adaptive issue queue for power-aware microprocessors
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3. Post-silicon CPU adaptation made practical using machine learning;Proceedings of the 46th International Symposium on Computer Architecture;2019-06-22
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